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SN74LS373DWR
IC D-TYPE TRANSP 8:8 20-SOIC
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- Datenblatt SN74LS373DWR DataSheet
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Spezifikationen
| Series | 74LS |
| Part Status | Active |
| Logic Type | D-Type Transparent Latch |
| Circuit | 8:8 |
| Output Type | Tri-State |
| Voltage - Supply | 4.75V ~ 5.25V |
| Independent Circuits | 1 |
| Delay Time - Propagation | 12ns |
| Current - Output High, Low | 2.6mA, 24mA |
| Operating Temperature | 0°C ~ 70°C |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295", 7.50mm Width) |
| Supplier Device Package | 20-SOIC |
| Base Product Number | 74LS373 |
Übersicht
Description
When the latch enable (LE) input is high, data present on the inputs (A0-A7) is continuously transferred to the outputs (Y0-Y7). When LE is low, the outputs hold the last latched state. This functionality allows for temporary data storage and is often used in data buffering, temporary holding, and in applications requiring controlled data flow.
The SN74LS373DWR is available in a 20-pin dual in-line package (DIP) and is compatible with various TTL logic families. It is commonly used in microcontroller and FPGA interfacing, as well as in bus systems and digital signal processing applications.
Features
1. Octal Latch: Contains eight latches that can store data.
2. Transparent Operation: The latch is transparent when the enable (E) input is high, allowing data to pass from input (D) to output (Q).
3. Control Inputs: Has an active-low enable input, which controls the latch operation.
4. Low Power Consumption: Operates with low power dissipation typical of LS (Low Power Schottky) technology.
5. High-Speed Operation: Typically provides fast switching times, suitable for high-speed digital applications.
6. TTL Compatible: Compatible with TTL (Transistor-Transistor Logic) levels, making it suitable for interfacing with other TTL devices.
7. Multiple Supply Voltages: Can operate within a specified range of supply voltages.
8. Wide Temperature Range: Designed for reliable operation in various temperature ranges.
These features make the SN74LS373DWR ideal for applications in data buffering, temporary data storage, and digital signal processing.
Package
Pinout
Pin Count and Functions:
- Pins 1-8 (A1-A8): Inputs for the data to be latched.
- Pins 9-10 (GND, VCC): Ground and power supply pins.
- Pin 11 (LE): Latch Enable input; when high, data is latched.
- Pin 12 (CLR): Clear input; when activated, it resets all outputs to low.
- Pins 13-20 (O1-O8): Outputs corresponding to the data inputs.
The device operates in transparent mode when the latch enable (LE) is high, allowing data to pass through from inputs to outputs. When LE goes low, the current input data is latched and held at the outputs until LE is activated again or the clear (CLR) function is used. The 3-state outputs allow multiple devices to connect to a common bus without interference.
Manufacturer
Application
Equivalent
1. SN74HC373 - High-speed CMOS version.
2. SN74HCT373 - High-speed CMOS with TTL-compatible inputs.
3. MC74HC373 - Motorola equivalent.
4. 74LS373 - Standard LS version without "DWR" packaging.
Ensure to check specifications for compatibility with your application.
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Zahlungen
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